nr3 standard cell family

3-I/P NOR gate
nr3 symbol
x1 drive strength cell with a P/N ratio of about 0.5.
z:(a+b+c)' cell width power Generic 0.13um typical timing (ps & ps/fF), pin c.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vgalib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
nr3v0x1 4.0  96 5.28 2.03  15.0  7.4f  52  3.36  40  1.29
nr3v0x1
 
Effort
FO4 Log.
a /\ 2.12 2.15
¯_
b /\ 1.93 2.02
¯_
c /\ 1.65 2.01
¯_
nr3v0x1 schematic nr3v0x1 standard cell layout