In this example, the space allocated to the metal-2 and metal-4 power straps is the same as the metal-3 straps: 160λ (8.8µm). Whereas however it is convenient for the metal-3 allocation to be a multiple of the cell height, the metal-2/4 allocation could be any integer track width.

Again we use the wide metal rules.

 width 4-6 8-30 32-74 76-106 108-174 176- space 4 5 12 22 37 62

A metal spacing of 12λ (0.66µm) gives supply strap widths of 64λ (3.52µm). The widths and spacings are measured between the centre lines of the next two adjacent wires as shown above, which is a distance of 168λ.

The straps are laid out so that the metal-4 Vdd runs above the metal-2 Vss and vice-versa. This means that we do not have stacked vias on the connections to metal-3. The Graal screen shot on the right shows the Vss supply straps for metal‑2, 3 and 4. The via2 connection is between metal‑2 and metal-3; the via3 connection is between metal-3 and metal-4; and they are not stacked above each other.

I personally do not like stacked vias and if possible try to avoid them. They can have special DRC rules, and their electrical resistance can be bigger than the simple sum of the two vias. In one 0.13µm technology for example, via2 and via3 resistances are 1Ω while a stacked via23 has a resistance of 5Ω and not 2Ω. Often this increased stacked via resistance is not modelled in the extraction technology.

Arranging the supply straps in alternating Vdd/Vss sequence avoids the use of stacked vias. It also increases the capacitance between Vdd and Vss, another desirable characteristic.

The metal-2 and metal-4 actually used for power straps is 128λ (3.52µm), 80% of the 160λ (4.4µm) allocated.

Illustration showing the Vss power straps in Metal-2/3/4, avoiding the use of stacked vias.