buf standard cell family

 non-inverting buffer
buf symbol
Non-inverting buffers with a stage effort of about 3.3 for the buf_x2 and 3.9 for the buf_x4 and buf_x8.
q:i cell width power Generic 0.13um typical timing (ps & ps/fF), pin i.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
sxlib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
buf_x2 1.3  40 2.20  0.88  24.1  2.5f  88  1.49 107  1.15
buf_x4 1.7  50 2.75 1.73  42.5  3.9f  92  0.74 113  0.57
buf_x8 2.7  80 4.40 3.46  84.3  7.2f  90  0.37 111  0.28
buf_x2
 
Effort
FO4 Log.
i /\
¯_ 1.59
buf_x2 schematic buf_x2 standard cell layout
buf_x4
 
Effort
FO4 Log.
i /\
¯_ 1.61
buf_x4 schematic buf_x4 standard cell layout
buf_x8
 
Effort
FO4 Log.
i /\
¯_ 1.58
buf_x8 schematic buf_x8 standard cell layout
Web data book for the sxlib. Vdd=1.2V, T=27°C, nominal process, generic 0.13um technology.   Copyright © 2005-2008 Graham Petley.  11 JAN 2008