no2 standard cell family

 2-I/P NOR gate
no2 symbol
The no2_x1 is a single stage 2-NOR with P/N ratio of 2.1. The no2_x4 is a 3 stage 2-NOR with stage efforts of about 0.9 and 3.9.
nq:(i0+i1)' cell width power Generic 0.13um typical timing (ps & ps/fF), pin i1.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
ssxlib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
no2_x1 1.3  40 2.20  0.69  10.1  5.2f  45  3.05  45  2.27
no2_x4 2.3  70 3.85 2.43  56.7  5.6f 141  0.76 145  0.61
no2_x1
 
Effort
FO4 Log.
i0 /\ 1.59 1.67
¯_
i1 /\ 1.44 1.61
¯_
no2_x1 schematic no2_x1 standard cell layout
no2_x4
 
Effort
FO4 Log.
i0 /\ 2.44 0.47
¯_
i1 /\ 2.27 0.45
¯_
no2_x4 schematic no2_x4 standard cell layout
Web data book for the ssxlib. Vdd=1.2V, T=27°C, nominal process, generic 0.13um technology.   Copyright © 2005-2008 Graham Petley.  11 JAN 2008