oan21 standard cell family

 2-OR into 2-AND gate
oan21 symbol
2 cells with different drive strengths, each with a P:N ratio of about 2. The oan21_x1 has a stage effort of about 1.7 and the oan21_x2 about 2.2.
z:((a1+a2)*b) cell width power Generic 0.13um typical timing (ps & ps/fF), pin a2.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vxlib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
oan21_x1 2.3  70 3.85  0.95  21.7  4.5f  80  2.96 113  2.31
oan21_x2 2.3  70 3.85 1.52  34.6  6.3f  83  1.56 115  1.22
oan21_x1
 
Effort
FO4 Log.
a1 /\
¯_ 2.21
a2 /\
¯_ 2.06
b /\
¯_ 1.76
oan21_x1 schematic oan21_x1 standard cell layout
oan21_x2
 
Effort
FO4 Log.
a1 /\
¯_ 2.08
a2 /\
¯_ 1.92
b /\
¯_ 1.66
oan21_x2 schematic oan21_x2 standard cell layout
Web data book for the vxlib. Vdd=1.2V, T=27°C, nominal process, generic 0.13um technology.   Copyright © 2005-2008 Graham Petley.  11 JAN 2008