ha2 standard cell family

 2-I/P half adder
ha2 symbol
2 I/P half adder with carry and sum outputs.
co:(a*b) cell width power Generic 0.13um typical timing (ps & ps/fF), pin a.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vsclib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
ha2v0x2 4.0  96 5.28 2.15  54.0  8.6f  74  2.14  85  1.66
so:(a^b) cell width power Generic 0.13um typical timing (ps & ps/fF), pin a.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vsclib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
ha2v0x2 4.0  96 5.28 2.15  46.4  8.6f 115  2.39 134  1.82
ha2v0x2
 
Effort
FO4 Log.
a /\ 3.21 2.17
¯_ 2.43
b /\ 3.25 2.08
¯_ 2.46
ha2v0x2 schematic ha2v0x2 standard cell layout
Web data book for the vsclib. Vdd=1.2V, T=27°C, nominal process, generic 0.13um technology.   Copyright © 2005-2008 Graham Petley.  11 JAN 2008