oai21b standard cell family

2-OR into 2-NAND with inverted input
oai21b symbol
Minimum drive strength cell with a P/N ratio of about 2 on the a1/a2 inputs, and a stage gain of about 1.1 on the b input.
z:((a1+a2)*b')' cell width power Generic 0.13um typical timing (ps & ps/fF), pin a2.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
wsclib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
oai21bv0x05 2.7  64 3.52  0.54   7.1  2.7f  62  7.29  47  5.33
oai21bv0x05
 
Effort
FO4 Log.
a1 /\ 1.97 2.13
¯_
a2 /\ 1.75 1.96
¯_
b /\
¯_ 1.82
oai21bv0x05 schematic oai21bv0x05 standard cell layout