cgi2a standard cell family

 carry generator inverting with inverted input
cgi2a symbol
The output is the inverted carry of the inverse of pin a and pin b and carry input c, with the delay from pin c being favoured. The cells here use a P/N ratio of 2.
z:((a'*b)+(a'*c)+(b*c))' cell width power Generic 0.13um typical timing (ps & ps/fF), pin c.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vxlib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
cgi2a_x05 2.7  80 4.40 1.12   9.8  3.2f  57  5.85  52  4.11
cgi2a_x1 2.7  80 4.40 1.98  17.9  5.9f  55  3.00  50  2.04
cgi2a_x2 5.0 150 8.25 3.52  34.3 10.4f  55  1.58  51  1.10
cgi2a_x05
 
Effort
FO4 Log.
a /\
¯_ 2.88
b /\ 2.72 3.50
¯_
c /\ 1.70 1.86
¯_
cgi2a_x05 schematic cgi2a_x05 standard cell layout
cgi2a_x1
 
Effort
FO4 Log.
a /\
¯_ 2.48
b /\ 2.60 3.38
¯_
c /\ 1.60 1.73
¯_
cgi2a_x1 schematic cgi2a_x1 standard cell layout
cgi2a_x2
 
Effort
FO4 Log.
a /\
¯_ 2.31
b /\ 2.68 3.53
¯_
c /\ 1.56 1.63
¯_
cgi2a_x2 schematic cgi2a_x2 standard cell layout
Web data book for the vxlib. Vdd=1.2V, T=27°C, nominal process, generic 0.13um technology.   Copyright © 2005-2008 Graham Petley.  11 JAN 2008