oai21a2b standard cell family

2-OR with one inverted input into 2-NAND with inverted input
oai21a2b symbol
Minimum drive strength cell with a P/N ratio of about 2 on the a1 input, a stage gain of about 1.4 on the a2 input, and 1.1 on the b input.
z:((a1'*a2)+b) cell width power Generic 0.13um typical timing (ps & ps/fF), pin a2.
leakage dynamic tR=PropR+RampR×Load(fF), tF=PropF+RampF×Load(fF)
vsclib013 gates lambda 0.13um nW nW/MHz PinCap PropR RampR PropF RampF
oai21a2bv0x05 3.0  72 3.96  0.73  15.8  2.4f  92  7.33  97  5.34
oai21a2bv0x05
 
Effort
FO4 Log.
a1 /\ 1.91 2.00
¯_
a2 /\
¯_ 2.23
b /\
¯_ 1.88
oai21a2bv0x05 schematic oai21a2bv0x05 standard cell layout